IEN - Micro/Nano Fabrication Facility
Etching Tools Semiconductor Recipes

Gallium Arsenide/Aluminum Gallium Arsenide

Gallium Arsenide Plasma-Therm RIE - Feature Etch

Temperature: 25-40 °C
Gases: Cl2 - 20 sccm 
BCl3 - 30 sccm
Pressure: 15 mTorr
Power: 150 W
DC-bias: 250 V
Etch Rate: 2000 Å/min

 

Gallium Arsenide Plasma-Therm RIE - Via Hole Etch

Temperature: 25-40 °C
Gases: Cl2 - 10 sccm 
BCl3 - 40 sccm
Pressure: 20 mTorr
Power: 75 W
DC-bias: 150 V
Etch Rate: 8000 - 10000 Å/min

Silicon

Si Plasma Therm RIE Trench Etch - Fluorine

Temperature: 25 °C
Gases: SF6 - 25 sccm 
O2 - 25 sccm
Pressure: 100 mTorr
Power: 180 W
DC-bias: 150 V
Etch Rate: 5000-7500 Å/min

 

Si Plasma Therm RIE Trench Etch - Chlorine

Temperature: 40 °C
Gases: SiCl4 - 30 sccm 
Cl2 - 20 sccm
Pressure: 30 mTorr
Power: 150 W
DC-bias: 200 V
Etch Rate: 1000 Å/min

 

 Si STS ICP Module 1: 2µm wide, 60µm depth bulk Si etch

  Etch Cycle Dep Cycle
Gases: SF6 - 130 sccm
O2 - 13 sccm
C4F8 - 20 sccm (ramped @ -4 sccm/min) 
(11+0s)
C4F8 - 85 sccm 
(8+0s)
Pressure: 24 - 22 mT 
(75% Fixed APC)
10 - 12 mT 
(75% Fixed APC)
Coil Power: 800 W 600 W
Platen Power: 12W, HF --
Process Time: 43:23 (min:s)
Temperature: Lid - 45°C
Platen - 20°C
He Back-cooling: 10 T

 

STS ICP Module 1 Results
Etch Depth: 60µm
Etch Rate: 1.55µm/min
Profile Angle: 89.9°
Selectivity (Si:PR): 53:1
Uniformity across wafer: ±1.0%
Initial Mask Undercut: 364nm/edge
Sidewall roughness: 150nm
Uniformity btw wafers: ±1.0%

 

 Si STS ICP Module 2: 1µm wide, 10µm depth SOI etch

  Etch Cycle Dep Cycle
Gases: SF6 - 130 sccm
O2 - 13 sccm
7+0s)
C4F8 - 100 sccm 
(5+0s)
Pressure: 20 mT 
(Auto APC)
20 mT 
(Auto APC)
Coil Power: 600 W 600 W
Platen Power: 14W, LF (5ms on) --
Process Time: 6:30 (min:s) with 10% over-etch
Temperature: Lid - 45°C
Platen - 20°C
He Back-cooling: 10 T

 

STS ICP Module 2 Results
Etch Depth: 10µm
Etch Rate: 1.91µm/min
Profile Angle: 89.4°
Selectivity (Si:PR): 53:1
Uniformity across wafer: ±1.0%
Initial Mask Undercut: 163nm/edge
Sidewall roughness: 123nm
Notch width at oxide interface: 148nm/edge
Uniformity btw wafers: ±1.0%

 

Si STS ICP Module 3: 5µm wide, 10µm depth SOI etch

  Etch Cycle Dep Cycle
Gases: SF6 - 130 sccm
O2 - 13 sccm
(7.5+0s)
C4F8 - 100 sccm 
(5+0s)
Pressure: 25 mT 
(Auto APC)
25 mT 
(Auto APC)
Coil Power: 600 W 600 W
Platen Power: 16W, LF (5ms on) --
Process Time: 8:45 (min:s)
Temperature: Lid - 45°C
Platen - 20°C
He Back-cooling: 10 T

 

STS ICP Module 3 Results
Etch Depth: 10µm
Etch Rate: 1.67µm/min
Profile Angle: 90.1°
Selectivity (Si:PR): 39:1
Uniformity across wafer: ±1.2%
Initial Mask Undercut: 147nm/edge
Sidewall roughness: 188nm
Notch width at oxide interface: 143nm/edge
Uniformity btw wafers: ±2.7%


 

Contact Information
Hang Chen, Ph.D.
Process Support Manager
The Institute for Electronics and Nanotechnology at Georgia Tech
345 Ferst Drive, Atlanta GA, 30332 | 1152
404.894.3360 | hang.chen@ien.gatech.edu