IEN - Micro/Nano Fabrication Facility
NNIN RET Data

The National Nanotechnology Infrastructure Network (NINN) had a Research Experience for Teachers (RET) fellowship which sponsored teachers and community college faculty at Georgia Tech from (2006-2009) to let them activally engage in cleanroom research. These are the presentations associated with the program. 

 

Evaluating Baseline Deposition and Etch Recipes for Silicon Dioxide and Silicon Nitride using PECVD and RIE Tools

Presentation developed by Ayesha K. Denny with the NNIN RETs Summer 2007 program. Evaluates the shallow etch recipes for silicon dioxide and silicon nitride on both the Advance Vacuum RIE and the front right position of the Plasma Therma RIE. Evaluated films include deposition from the STS PECVD, Unaxis PECVD, and Plasma therm PECVD.   

 

A comparison of Resist Selectivity & Etch Profiles on Silicon Processed by the Plasma Therm and STS ICP

Presentation developed by Rochelle Hamby and Jaclyn Murray with the NNIN RETs Summer 2007 program. They examined the selectivity of silicon to SPR 220-7 with different pre-bake and postbake times.

 

The Effects of Process Parameters during the Deposition of SiNx using PECVD

Presentation developed by John Nice and Joyce Palmer with the NNIN RETs Summer 2006 program. They examined SiNx films from Plasma Therm, Unaxis and STS PECVD systems by looking at how standard settings (gas flow rate, pressure, temperature, and power) effected the deposition rate, uniformity and index of refraction.

 

 

 

Contact Information
Hang Chen, Ph.D.
Process Support Manager
The Institute for Electronics and Nanotechnology at Georgia Tech
345 Ferst Drive, Atlanta GA, 30332 | 1152
404.894.3360 | hang.chen@ien.gatech.edu