IEN - Micro/Nano Fabrication Facility
Packaging

Dicing

Dicing is used for singulation of the dies from the wafer. Often, the width of the cutting blade needs to be taken into account for chip spacing on a mask design. There are hints and suggestions in the powerpoint under realted content. 

Flipchip Bonding

Flipchip bonding is an interconnect technology which the chip's active side faces down toward the substrate. Depending on the interconnect type, the stackup for the chip's electrode .

General rule design guideline for flipchip bonding: document with general rule design guideline for flipchip bonding and during the initial chip design following a few of the guidelines will make testing easier. Sign in is required-put your gatech e-mail as the user name microsoft will redirect to GT login.

Polisher/Lapper

Grinding and CMP are often used in microelectronincs and nanotechnology in various ways including grinding off over the excess plated material to make a planer work surface, to creating cross-sections for imaging purposes. 

Power point presentation in related media:  broad guidelines and troubleshooting slides

Wafer Bonding

Anodic fusion, adhesive & thermal compress wafer bonding are available to do in the cleanroom on the Karl Suss SB8E.  Anodic bonding typically creates a hermtic seal and commonly used to seal glass to silicon wafers. It can handle substrates 6 inches or less.

Wire Bonding

Wire bonding is an interconnect technology where the chip's active side is facing up and a wire connects the electrodes on the chip to the substrate's electrodes. It is a current standard interconnect in industry. Often for testing, an IC ceramic socket is used to make signals from the chip to the test setup easier. A die attach material is need to keep the chip in place as well as thick enough electrodes to absorb the energy during a bond. It is recommended to have at least a xxx nm Au layer on top of the electrode for wire-bonding purposes. Also after wire-bonding, a protective paryalene coating can be used.

Power point presentation in related media: Common settings used on IEN tools and broad guidelines

Online source from Palomar: A Guide to modern Wedge bonding

 

Related Links
Video about creating a cross-section
Contact Information
Hang Chen, Ph.D.
Process Support Manager
The Institute for Electronics and Nanotechnology at Georgia Tech
345 Ferst Drive, Atlanta GA, 30332 | 1152
404.894.3360 | hang.chen@ien.gatech.edu